High Speed Interface(IO) Design Engineer

ResponsibilitiesIntegrate and verify HSI IP blocks in SoC, and support physical implementationConfigure HSI IP blocks to be integrated into SoC to achieve maximum performancePerformance analysis in chip top level (bus, memory bandwidth) simulation and FPGA prototypingTest, Debugging & Troubleshooting of Silicon collaborating with HSI IP vendorsMinimum Qualifications5+ years of industry experience in chip design, specializing in HSI(High-Speed Interface) technologyExperience in RTL design and logic synthesis, verification, timing closurePreferred QualificationsExcellent understanding of High-Speed Interface standard specifications (e.g PCIe, LPDDR, HBM, Ethernet or D2D)High understanding of High-Speed interface technology e.g. SERDES, Channel encoding, OSI-7 layer, Equalization, etc.Experience in SoC design with HSI and troubleshooting in Silicon using Test EquipmentUnderstanding of System-level usage of HSI applicationContactrecruit@furiosa.ai