Physical Engineering (PI/PD) Engineer

ResponsibilitiesEvaluate the PPA of our design as part of the chip architecture planning process.Perform synthesis, logic equivalence checking, SDC & UPF development, and static timing analysis.Work collaboratively with a design house to achieve the best outcome.Minimum QualificationsBachelor’s degree in Electronic Engineering or other technically related fieldsExperience with using Verilog HDL for digital logic design2+ years of industry experience with logic synthesis, LEC, STA, producing SDC & UPFExperience with EDA tools (Synopsys tool chain, DC, FM, PT) and scripting (TCL, shell)Preferred Qualifications5+ years of industry experience with ASIC designDFT, Place and Route experienceExperience with high-speed connectivity IPs (e.g., PCIe, Ethernet, HBM)Contactrecruit@furiosa.ai