Sr. Analog Layout Design Engineer

DescriptionA cover letter outlining your motivation to move to Oslo, Norway is required with submittal of your CV.The Analog Layout Design Engineer will be joining our team, developing market leading image sensor solutions for automotive segment. In a rapidly developing industry, you will do chip and block level layout, as well as chip level integration, performing all necessary verification of our state of the art image sensors.ResponsibilitiesCarry out block level and chip level full custom analog layout and chip level integration to ensure timely completion of ASIC.Work with design engineers on chip architectural designs, floor planning and pad frame decisions.Physical verification using Calibre.Do some block level design and support verification by carrying out simulations when neededRequirementsMinimum BSEE with at least 6 years of experience in analog layout or a MSEE with at least 4 years of experience in analog layoutGood understanding of CMOS fabrication processesExtensive experience with Cadence VirtuosoExperience with Calibre DRC/LVSExperience with design and simulation of CMOS circuitsExcellent command of English as a working language.