Lead UVM Verification Engineer

Pure Silicon is growing, and we’re looking for a Lead UVM Verification Engineer to join our team. If you're passionate about building world-class verification environments and driving complex SoC programs to success, this role is for you.About the RoleAs a Lead UVM Verification Engineer, you will architect, implement, and drive UVM-based verification for complex IP and SoC designs. You will collaborate directly with hardware, firmware, and DV teams to ensure functional correctness, performance, and reliability while playing a key leadership role in methodology, execution, and team development. This position requires responsibility for tracking verification progress against goals and schedule, identifying gaps, and adapting plans to ensure timely and complete closure.ResponsibilitiesArchitect and implement UVM-based testbenches for complex SoCs and IP blocksDefine, execute, and maintain verification plans aligned to design specs and program milestonesDevelop reusable UVCs, scoreboards, and reference models with strong emphasis on modularity and maintainabilityDrive simulation-based verification using constrained-random, directed tests, and assertionsCollaborate closely with design, firmware, and DV teams to triage issues and close functional/code coverageIntegrate, analyze, and act on functional and code coverage metricsLead HW/SW co-verification, including firmware interactions and driver-level testingTrack verification progress against goals and time budget; adjust plans as needed to ensure alignmentMentor junior engineers and contribute to verification methodology improvements across the teamQualificationsBachelor’s or Master’s in Electrical Engineering, Computer Engineering, or related field8+ years of experience in simulation-based hardware verificationStrong expertise in SystemVerilog and UVM methodologyProven experience with SoC-level verification and HW/SW co-verificationHands-on experience with common industry protocols (PCIe, Ethernet, AMBA AHB/AXI)Excellent debugging skills using waveforms, assertions, and simulation logsFamiliarity with coverage-driven verification and regression infrastructureStrong communication and collaboration skillsExperience with Hardware Description Languages (Verilog, SystemVerilog, VHDL)Experience with scripting languages (Perl, TCL, Python, etc.)About UsAt Pure Silicon, we are building a high-impact team that is reshaping the world of semiconductor design and verification. We thrive on solving deep technical challenges and delivering robust, scalable silicon solutions. Our culture is rooted in:·      Technical excellence·      Collaboration·      Ownership & innovation