AI Engineer

Competitive SalaryCharterhouse is partnered with a fast-growing technology company pioneering the development of advanced AI-optimized hardware and infrastructure. Our Client is dedicated to accelerating AI innovation by delivering high-performance, scalable, and energy-efficient infrastructure. As part of their expansion, they are looking to hire experienced AI Engineers (multiple openings) to join their team.The AI Engineer will be responsible for designing and implementing scalable AI systems and pipelines based on LLMs, leveraging Python and modern generative AI frameworks. In this role, the Engineer will also build internal GenAI systems and demo applications that showcase the power of the company’s proprietary hardware.Key responsibilities include optimizing prompts, embeddings, retrieval mechanisms, and model behaviour, as well as fine-tuning models to enhance domain-specific performance. The role requires building custom pipelines for document ingestion, chunking, embedding generation, and retrieval, in addition to maintaining workflows for model versioning, reproducibility, as well as experiment tracking. Furthermore, the AI Engineer will also collaborate with AI hardware teams to profile workloads and evaluate model performance across various accelerator platforms.The successful candidate will demonstrate strong programming skills in Python and familiarity with data analysis libraries such as Pandas, NumPy, and SQL which are essential for the role. Hands-on experience with fine-tuning models (via LoRA, qLoRA or full fine-tuning) deploying retrieval-augmented generation (RAG) solutions, working with vector databases (e.g., Milvus, Chroma), and utilizing evaluation frameworks such as Ragas or DeepEval is required.In addition, experience with large-scale deployment and monitoring tools (e.g., ClearML, Kubeflow) is also highly desirable, along with a solid understanding of software engineering best practices, including testing, debugging, documentation, and version control. Knowledge of CPU, GPU, or custom accelerator architectures such as NPUs, TPUs is preferred.